MP + OS Kernel

1. Открываешь Intel® 64 and IA-32 Architectures Software Developer’s Manual Volume 3A: System Programming Guide, Part 1
2. Читаешь раздел 8.6

 

Проблему, кажется, решил.

После программирования APIC в Virtual Wire Mode комп перестал виснуть.

Код (Text):

1. #define APIC_DWREG_SVR              0x003c  /* Spurious Interrupt Vector Register   */
2. #define APIC_DWREG_LVT_LINT0        0x00d4  /* LVT LINT0 Register                   */
3. #define APIC_DWREG_LVT_LINT1        0x00d8  /* LVT LINT1 Register                   */
4.  
5.     size_t addr = size_t(ReadMSR(IA32_APIC_BASE));
6.     FBase = reinterpret_cast<DWORD *>(addr);
7.  
8.     // Initialize virtual wire mode
9.     // Enable the APIC via SVR and set the spurious interrupt to use Int 00F
10.     FBase[APIC_DWREG_SVR] = (FBase[APIC_DWREG_SVR] & 0xffffff0f) | 0x100;
11.     // Program LVT1 as ExtInt, which delivers the signal to the INTR signal
12.     FBase[APIC_DWREG_LVT_LINT0] = (FBase[APIC_DWREG_LVT_LINT0] & 0xfffe00ff) | 0x5700;
13.     // Program LVT2 as NMI, which delivers the signal on the NMI signal of all
14.     // processors' cores listed in the destination.
15.     FBase[APIC_DWREG_LVT_LINT1] = (FBase[APIC_DWREG_LVT_LINT1] & 0xfffe00ff) | 0x5700;

Код откопал в Multiprocessor Specification 1.4 от Intel.